Spring 2008
Instructor Dr. Scott Thompson
535 Engineering Bldg
846-0320
Office hours: M, W, F 3th/4 period
(plus email thompson@ece.ufl.edu for more)
Grader Srivatsan Parthasarathy (psrivats@ufl.edu)
Textbook Nanoelectronics and Information Technology by Reiner Waser (ISBN: 978-3527405428, Wiley-VCH)
Plus instructor handouts, classic
and state of the art review papers from the literature (for example:
VLSI Technology Symposium Short Course Emerging Information Processing
Technology beyond CMOS), and
a few short videos (public interview by
Prerequisite Basic knowledge of semiconductor physics and devices. The class will be introductory and targeted towards students with a diverse background from electronics to material science. The class will be designed to introduce CMOS, non classical CMOS, and post CMOS device concepts without a quantum mechanical background.
Grading
Homework/team project assignments and team project.
– 90%
• 20% Exam 1: Feb 5
• 20% Exam 2 March 4
• 20% Exam 3 April 3
• 30% Final exam ( exam 1F May 1 8-10PM *note PM)
– 10% homework/real world semiconductor team research project
• Class divided into ~ 3 - 4 person per group
• **Some*** 5 – 10 min group periodic report out
• Final report
• Part peer evaluation
Summary This class will expose the student to state of the art technology issues and industrial team problem solving. The class will provide links between the short-term topics, which will certainly be in production during the next 10 years such as nano-scale MOSFET, strained Si, high k gates to far-reaching topics, which are well ahead or off the main stream, offering high potential. Some of these topics will include carbon nanotubes, molecular electronics and single electron devices for logic applications.
Relevance The
slowing of

Course topics
Week 1-2
Week 3 Logic device: State of the Art for a Si MOSFET
Week 4 Requirements for a logic device replacement
Week 5-6 CMOS devices limits: quantum-statistical
Week 7-11 Post CMOS logic device
- Multi-Gate CMOS
- Carbon nanotubes
- High level overview of Quantum Transport Devices
- Single electron devices for Logic applications
- Spintronics
Week 12-14 Memory devices
DRAM, ferroelectric, magneto resistive, and phase change RAM
Week 16 December 8th and 10th
Other
•
Class
attendance required. Class
attendance/participation used to decide “close” grades (i.e. A or B+?)
•
No
make-up exam/homework unless very good reason.
See me. Will be handled on case
by case basis
•
Student
with disability: Students requesting
classroom accommodation must first register with the Dean of Student
Office. The Dean of Students Office will
provide documentation to the student who must then provide this documentation
to the instructor when requesting accommodations.
•
Expect
on time to class. No cell phones
• University honesty policy